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    P89C51RD2F FEATURES芯片解密

    分类:Philips芯片解密 | 发布:芯片解密 | 查看: | 发表时间:2010-12-15

      芯谷科技在单片机解密、IC解密过程中运用不同的技术手法,而解密手法的选择除了考虑解密者本身的技术经验外,还应该对需解密的单片机有一定的了解。
      P89C51RD2F FEATURES:
      . 80C51 Central Processing Unit
      . On-chip Flash Program Memory with In-System Programming
      (ISP) and In-Application Programming (IAP) capability
      . Boot ROM contains low level Flash programming routines for
      downloading via the UART
      . Can be programmed by the end-user application (IAP)
      . 6 clocks per machine cycle operation (standard)
      . 12 clocks per machine cycle operation (optional)
      . Speed up to 20 MHz with 6 clock cycles per machine cycle
      (40 MHz equivalent performance); up to 33 MHz with 12 clocks
      per machine cycle
      . Fully static operation
      . RAM expandable externally to 64 kB
      . 4 level priority interrupt
      . 8 interrupt sources
      . Four 8-bit I/O ports
      . Full-duplex enhanced UART
      – Framing error detection
      – Automatic address recognition
      . Power control modes
      – Clock can be stopped and resumed
      – Idle mode
      – Power down mode
      . Programmable clock out
      . Second DPTR register
      . Asynchronous port reset
      . Low EMI (inhibit ALE)
      . Programmable Counter Array (PCA)
      – PWM
      – Capture/compare
      tags;P89C51RD2F单片机解密 芯片解密

    Tags: 芯片解密  
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